D flip-flop implementation
Negative-edge triggered D flip-flop
Input must satisfy setup and hold times
Characteristic equation: Q(t+1) = D
Q
Q'
D
Clk=1
R
S
0
0
D'
D'
holds D' when
clock goes low
holds D when clock goes low
D
D
Q
Flip-flops: “>” on CLK input
Latches: No “>” on CLK input
Q
CLK
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