Synchronous sequential digital systems
Steady-state abstraction
- Combinational: Outputs depend on current inputs after sufficient time has elapsed
- Sequential: Outputs retain their settled state
Logic designers rely on the steady-state abstraction when constructing sequential circuits
- the memory of a system is its state
- changes in state only occur at specific times
- a periodic signal times or clocks the state changes
- the clock period is the time between state changes
- The clock period must be long enough for all voltages to reach steady-state before the next state change