FSM design: A 5-step process
1. Understand the problem
– Draw a state diagram and state-transition table
2. Determine the machine’s states
– Consider missing transitions: Will the machine start?
– Minimize the state diagram: Reuse states where possible
3. Encode the machine’s states
– Encode states, outputs (and inputs, if allowed) as a binary code
4. Design the next-state logic
– Minimize the combinational logic
– Choices made in steps 2 and 3 can affect the logic complexity
5. Implement the FSM
– Registered PAL, FPGA, semicustom IC, etc.