CSE370 Quiz 4 (22 November)


1. Complete the timing diagram below for Q showing the operation of the following circuit. Note that Q has an initial value of 1.


2. We have a counter that goes through a sequence of 6 states before repeating. Its outputs in those states are 00, 01, 10, 11, 10, and 01, respectively. Show a state diagram for this counter and suggest a state encoding. Write the state encoding directly below the state bubble.


The state diagram is drawn so that the output for each state is written within the state bubble and the state'e encoding is written below it. We will use the outputs of the states as a start for the state encoding. Note that there are two pairs of states with the same output. An extra bit needs to be added to the state encoding to distinguish these and guarantee that all states have a unique code. Thus, we have three bits of state which is consistent with the fact that counter cycles through six states.


Comments to: cse370-webmaster@cs.washington.edu (Last Update: )