CSE 370 Assignment #6
Due: Friday, February 20, 2009.
Distributed: Wednesday, February 11, 2009.
Reading Assignment:
- Katz/Borriello, Contemporary Logic Design 2e, Finish Chapter 6 (pages 259-298)
- Katz/Borriello, Contemporary Logic Design 2e, Read Sections 7.1-7.3.1
(pages 307-332)
Exercises:
Please write legibly & show your work for full points.
- CLD2e page 301, Chapter 6, Exercise 6.11 parts a,b,c,d.
- CLD2e page 303, Chapter 6, Exercise 6.17.
- CLD2e page 303, Chapter 6, Exercise 6.19.
- CLD2e page 348, Chapter 7, Exercise 7.9.
- CLD2e page 349, Chapter 7, Exercise 7.10.
- CLD2e page 349, Chapter 7, Exercise 7.11 part a.
Rationale:
- To practice dealing with non-idealities in digital logic, namely timing issues.
- To begin understanding the basic building blocks of sequential circuits.
- To gain an understanding of registers and counters.