CSE 370 Introductory Laboratory Assignment

Applying Your Knowledge

Assigned: Monday, November 30, 2009
Due: Thursday, Dec. 10, 2009

Objectives

Before You Begin

Tasks:

Magnetic Stripe Reader Timing

1. The Magnetic Stripe Reader is much like the LCD in that it has a series of signals, the important signals on the magnetic stripe reader are: RCP1, RDP1, and CLS. It’s also important to note that all three of these signals are inverted, this means when one of the signals is toggled, it actually goes from high to low, instead of low to high. This is apparent in the timing diagram below. The timing for the signals is as follows:
   
   1. CLS is asserted when the card enters the card reader.
   
   2. At a later point RCP and RDP signals begin to be asserted. At the falling edge of RCP, RDP should be sampled for data.
   
   3. RDP should be sampled at every negative edge of RCP, remember that RDP is inverted so if you sample a 0, it’s actually a 1 and vice versa.
   
   4. Every 7 bits that you sample over RDP is a single ASCII character, you will have to decode it with the information found in the datasheets however.
   
   5. RCP will stop oscillating when there is no more data to be sent. RDP will go back to high, and CLS will go back to high as well.
   
   
   Use this information to draw a state diagram that you will code in Verilog to read data from the magnetic stripe reader. Have your TA check this before you move on.

The Order of Data

2. As you may have noticed already, data comes over RDP in a serial fashion, one bit at a time. The data comes over RDP in reverse order as well, the least significant bit first followed by the upper bits. There are a total of 7 bits per character; but the last bit (the highest order bit) is a parity bit so you can ignore it. There are several special characters as well, such as the start sentinel: 1000101, this start sentinel tells you when valid data begins. You should refer to the Reference Table for the exact encoding of all the supported characters. Take the time to look at the LCD encoding and the magnetic stripe encoding and determine what you need to do to the data from the magnetic stripe reader in order for the LCD to recognize it. You will have to code this into your verilog module later on.

Asynchronous Inputs

3. The signals from the magnetic stripe reader are not synchronous to our clock, meaning they can change anytime, even right when our clock is "ticking". This means, that if we sample one of these signals with a register, we could violate the setup/hold time constraints of the register. We will address this in class, but for now, the way to solve this problem is to put two registers back to back (a shift register) on the RCP input and only use the output of the second register. (Why do you need to do this only for RCP?)

Building The Logic

4. Now you are ready to actually create the actual logic that makes the magnetic card reader work in conjunction with your LCD logic. First off you should create a new design for Lab 9 that has design flow since you will be synthesizing it onto the FPGA eventually. You will have to add copies of the files from lab 8 that controlled the logic of your LCD. If you want you can even rename the copied over block diagram file from lab_8.bde to lab_9.bde. From there you will want to remove the inputs you had added for the switches. You need to add new inputs for CLS, RDP and RCP because that’s the signals coming from the magnetic card reader.
   
   Next you need to write up the verilog code for your magnetic card reader logic. Don’t forget the logic that was explained above when you write your code. It should have a single 8-bit output, which you will direct to any inputs you hade in lab_8 that was hooked up to the 8-bit switch input.

Testing your Logic:

5. A test fixture has been provided for you that will provide all the signals, all you need to do is hook it up appropriately. You can download the two test fixtures here: magreader_tf.v and lcd_tf.v You can refer to the picture below on how to wire up your test fixture. Run the test and make sure everything passes successfully. The test fixture should print HOORAY!1+1=2 twice. If it does you are now ready to synthesize and demonstrate.
   
   

Synthesizing and Wiring:

6. Now that you have tested your circuit and everything seems to be working it is time to synthesize it onto the FPGA and demonstrate it to the TA. Don’t forget to write up your .qsf file. You may be curious as to how you will get external signals like the LCD and Magnetic Card Reader to the FPGA. Well the io ports that you used in the earlier labs directly connect to the FPGA via the pin names on the label. This means inside your .qsf file you can assign the inputs from the magnetic card reader and outputs to the LCD to the io ports on your prototyping board via the pin labels on the label. You can refer to this page: IO Pins, if you are confused. What’s more, you can choose any io port you like in any order, which can make wiring very easy. Take a look at the TA’s sample solution below. That’s very clean wiring isn’t it?
   
   
   IO Ports, A13, B13, etc...
   
   
   Good Wiring Example
   Remember, the pin-outs described in the documentation are wrong. You should use the following pin-out below when wiring up your magnetic card reader to the io ports on your prototyping board.
   
   

   Pin Number	Color	Signal
   1	White	Frame GND (0)
   2	Grey	Signal GND (0)
   3	Purple	VCC (1)
   7	Orange	RDP1
   8	Red	RCP1
   9	Brown	CLS

Additional Functionality (to make up lost lab points or just for fun!)

Lab Demonstration/Turn-In Requirements

1. Have a TA check you off for your Magnetic Card Reader State Diagram.
2. Have a TA check you off for your working Magnetic Card Reader with LCD.