// // Title : 4 bit adder test fixture // Design : Homework 5 // Author : Carl Ebeling // Company : CSE 370 // //------------------------------------------------------------------------------------------------- // // File : add4_tf.v // // Description : This test fixture tests the 4-bit adder component of the // carry-lookahead adder //------------------------------------------------------------------------------------------------- `timescale 1ns / 1ns module add4_tf (A, B, Cin, Sum, P, G); output [3:0] A, B, Cin; // Data input to adder input [3:0] Sum, P, G; // Results from adder reg [3:0] A, B, Cin; // Data input to adder integer errors; integer count; integer i, good; initial begin errors = 0; // Perform exhaustive test: for (count = 0; count < 8; count = count + 1) begin for (i = 0; i < 4; i = i + 1) begin { A[i], B[i], Cin[i] } = count; // Test vector end #10 good = 1; for (i = 0; i < 4; i = i + 1) begin if ((Sum[i] !== (A[i] + B[i] + Cin[i])) || (P[i] !== (A[i] ^ B[i])) || (G[i] !== (A[i] & B[i]))) begin good = 0; end end if (!good) begin $display("***Error*** A:%b, B:%b, Cin%b, Sum:%b, P:%b, G:%b", A, B, Cin, Sum, P, G); errors = errors + 1; $stop; end end if (errors == 0) $display("Test passed - No errors!!"); else $display("**** %d Errors****", errors); end endmodule