1. Implement a Full Adder with 2 8x1 multiplexers.
2. Consider the following three functions. Use this template for these exercises.
· F(A,B,C,D) = Σm(2,4,5,6,8,12) + Σd(7,10,14)
· G(A,B,C,D) = Σm(0,4,5) + Σd(6,12)
· H(A,B,C,D) = Σm(0,4,6,7,8) + Σd(10,12,14)
a) Implement F, G and H on the PLA. Use as few product terms (AND gates) as you can. The number of inputs that each product term uses does not matter. (This is different from normal 2-level optimization where we care about both the number of gates and the number of inputs.) This PLA does not have optional output inverters, so you must implement the "true" versions of the functions. Remember that when you are designing for PLAs, the main thing you want to optimize is sharing of terms between functions, not the size of the rectangles in the K-maps.
b) Implement as many of F, G and H as you can on the 2-product-term-per-OR-gate PAL. Some of them may not fit, and in that case, you should just explain why the function does not fit. The number of product terms you use on the PAL does not matter, because the structure of this PAL does not allow for sharing product terms.
3. Design Problem
Design
Problem:
You are a designer working for OurChipsRock Inc. Your company has 2 important foreign customers based in Lalaland where people speak the language lulu.
The Lulu script has the following 4
characters : ♣ ß Ņ Ʃ.
Lulu script is
rank sensitive which means that the characters only appear in order of rank. ß can never appear before ♣;
Ņ will never appear before ♣ or ß; and Ʃ will never appear before ♣, ß or Ņ in a word.
♣ and Ņ are prepositions and are considered as words. It
has the following conjunctions: ßƩ,
♣Ʃ and ♣Ņ. The
words for food, water and clothing are respectively ♣ßƩ, ♣ŅƩ and ßŅƩ. The only other
word in the language is ♣ßŅƩ
which means “Hyperspace bonus achieved. Level Completed”. Obviously,
with a limited vocabulary of 9 words, the people of Lalaland preferred to talk
less and play more videogames.
Your Customers from Lalaland are ♣ - ß and ƩƩ. They both require a valid lulu word recognizing hardware platform. Your company is developing this Application-Specific circuit for them.
The Hardware team has designed a board with 4 switches and a Flashbulb F. The switches and F are active-high (logic 1 results from the switch being ON and logic 1 is required to turn on F). Each switch corresponds to a character form the lulu language. Based on the setting on the switches, you need to make the flashlight signal high (‘1’) which glows the flashbulb F to indicate that the word is valid.
For example, consider the following switch configuration:
♣ ß Ņ Ʃ
| | | | | | | |
ON OFF ON OFF
This should make the flashlight
signal ‘F’ high because this corresponds to the word ♣Ņ which is
valid.
♣
ß Ņ Ʃ
|
| | | | | | |
ON ON ON OFF
This should make the flashlight
signal ‘F’ low because this corresponds to the word ♣ ß Ņ which is
not a valid word.
Note: If all 4 switches are OFF, it is not a valid word.
Your task as the star design in OurChipsRock Inc, is to develop the logic circuit that will implement the F signal based on the switch inputs. Each of the companies has a slightly different spec and you need to meet the minimum specs for the product you give them.
The companies have provided you the following Specs:
♣ - ß Product Spec:
Cost: Less than 110$
Power Dissipation: Less than 70uW
Area: Less than 40 sq generic units
ƩƩ Product Spec:
Cost: Less than the cost of a GMI box that retails at 250$.
Power Dissipation: Less than 110uW
Area: Any small design that can fit on a slab that is 200x150 sq generic units.
You only have the following gates in you inventory. You need to make 2 designs with the available gates – one for ♣ - ß and one for ƩƩ. Use them wisely. If you use up all your 2-input AND gates on the ♣ - ß design, you will have no 2-input AND gates to use in the design for ƩƩ.
Design the circuits for the companies that can at least meet the minimum specs. Extra credit will be awarded for the following designs:
a) Lowest cost implementation (cost for a single design)
b) Lowest total cost (sum of costs for both designs)
c) Lowest Power implementation
d) Lowest total Power
e) Lowest area implementation
f) Lowest total area
g) Most balanced implementation (lowest product of total Power, total Area and total Cost)
Tabulate your results as follows:
Company |
Function |
Inverters |
2i/p AND |
3 i/p AND |
2i/p OR |
XOR |
Cost |
Power |
Area |
Product |
♣ - ß |
Your function |
2 |
2 |
0 |
3 |
0 |
79 |
58 |
34 |
|
ƩƩ |
Your function |
5 |
1 |
0 |
4 |
0 |
85 |
70 |
40 |
|
Total |
|
|
|
|
|
|
164 |
128 |
74 |
1553408 |
Note: The company names ♣ - ß and ƩƩ are not words in lulu.
· Understand Multiplexors
· To gain experience with PLDs
· Learn to consider design tradeoffs