// // Title : 1 bit adder test fixture // Design : Homework 5 // Author : Carl Ebeling // Company : CSE 370 // //------------------------------------------------------------------------------------------------- // // File : add1_tf.v // // Description : This test fixture tests the 1-bit adder component of the // carry-lookahead adder //------------------------------------------------------------------------------------------------- `timescale 1ns / 1ns module add1_tf (A, B, Cin, Sum, P, G); output A, B, Cin; // Data input to adder input Sum, P, G; // Results from adder reg A, B, Cin; // Data input to adder integer errors; integer count; initial begin errors = 0; // Perform exhaustive test: for (count = 0; count < 8; count = count + 1) begin { A, B, Cin } = count; // Test vector #10 if ((Sum !== (A + B + Cin)) || (P !== (A ^ B)) || (G !== (A & B))) begin $display("***Error*** A:%b, B:%b, Cin%b, Sum:%b, P:%b, G:%b", A, B, Cin, Sum, P, G); errors = errors + 1; $stop; end end if (errors == 0) $display("Test passed - No errors!!"); else $display("**** %d Errors****", errors); end endmodule