Homework 5
Distributed Friday, October 26, 2007
Due before 10:30, Wednesday, October 31, 2007
Please put your full name and lab section letter on your homework.
Always remember to staple your work, if it is multiple pieces of paper.
If you choose, indicate on the top of your assignment roughly how much time you
spent on it. This information will have no impact on your grade; it will only
be used by an inexperienced course staff to gauge the volume of work to assign.
- (25 points)
3.18 (b) Remember that hazards only exist where adjacent terms are
covered by different K-map rectangles (a.k.a. implicants).
- (25 points)
3.19. The book says "Write down its functions in minimized form." Instead of
doing that, just write a truth table with A and B as inputs and columns for F
and G. It will probably be helpful to draw waves for the intermediate points in
the circuit as well as F and G, but you don't have to. Make sure you notice the
line of text carefully hidden just before exercise 3.20.
- (25 points)
In class we saw an 8-bit carry-select adder broken up into 4-bit chunks. Draw a
schematic for a 16-bit carry-select adder broken up into 4-bit chunks.
Calculate the size of the circuit in terms of number of full adders and 2-1
multiplexors. Also calculate the delay in terms of "full adder delays" and "2-1
multiplexor delays". Compare the size and delay with a those of a simple 16-bit
ripple-carry adder. This size and delay should be specific numbers for 16-bit
adders, not expressions with "n" for arbitrary bit-width. Hint: the third and
fourth chunks (counting from less significant bits up to more significant) are a
little more complicated than the second chunk in the 8-bit adder, but not much
more complicated. You just have to think about where the carry in should come
from.
For reference, Figure 5.19 in the book shows a 8-bit carry-select adder with
4-bit chunks.