Due before 10:30, Wednesday, October 10, 2007

Please put your full name and lab section letter on your homework.

Always remember to staple your work, if it is multiple pieces of paper.

If you choose, indicate on the top of your assignment roughly how much time you spent on it. This information will have no impact on your grade; it will only be used by an inexperienced course staff to gauge the volume of work to assign.

Do the following problems from Contemporary Logic Design, 2nd Ed. by Katz and Borriello

2.13 (8+2+8 = 20 points) [ xor gates can be represented as block diagrams of AND, OR, NOT Gates once you get the other gates ]

2.14 (5 points)

2.15 (5 points) [ We haven't covered timing diagrams in lecture yet, so just give your answer in terms of how much depth you would expect the two circuits to have. ]

2.17, parts c and e (5+5 = 10 points)

2.18 (5+5=10 points)

2.19 (5 points each sub-division = 20 points)

2.21 (5+5=10 points)

2.22 (a) and (e) [non-minimized] (5+5=10 points)

2.22 (a) and (c) and implement reduced F as NAND gate and reduced F' as NOR gate (5+5+5=15 points)

Extra question apart from the questions in book:

Boolean Cube Question ( 10 points )

Draw Boolean cubes for the following two functions. Identify and label the largest planes you can find. For the first function, find 1-planes and for the second find 0-planes. You can find a more precise definition of planes than I gave in lecture in sections 2.5.1 and 2.5.2 in the book.

F1(x,y,z) = Σm (1, 2, 4, 5)

F2(x,y,z) = ΠM(0,2,3,5,7)

Boolean Cube Question ( 5 points )

Reduce to min number of terms using Boolean cube method :

F(x,y,z) = Σm (1, 2, 4, 5)