CSE370 Laboratory Assignment 3

Programming in Verilog

Distributed: Friday, January 23, 2006
Due: By end of lab session

Objectives

In this laboratory assignment you will continue to learn how to use the Aldec Active-HDL tool. This time the focus will be on how to create Verilog modules.  You will also see how Verilog modules can be used as test fixtures to help you verify your circuit.  By the end of this lab you should feel comfortable creating a Verilog module directly and setting up a test fixture.

Tasks

  1. Complete the Active-HDL Tutorial #3, which describes how to write simple Verilog modules and use them in schematics. As part of the tutorial, you will write and test the Verilog module for a full-adder. Create a test schematic and using this test fixture (test fixtures will be covered in more detail next week, so don't worry about how they work for now) make sure that your Verilog module works correctly.  Once you have imported FA_tf and compiled it, hook it up like this:


    Now simulate it, your console should show that the test passed successfully.
  2. Create a Verilog module in Active-HDL to detect a Fibonacci number between 1 and 15 (1, 2, 3, 5, 8, 13).  Test it with this test fixture. NOTE: In step 3 you will wire up your Fibonacci circuit, so it is suggested that you come up with a boolean expression that uses NANDs and/or NORs as opposed to if-than-elses or other constructs.  This way once your circuit passes simulation, it will be easier to move from the verilog to the gates on your board and you will know that your logic is correct.  Show a TA your equation before proceeding.
    HINT: As you learned in class, don't cares can be usefull in simplifying a circuit.  If you wish you may treat 0 as a don't care, inform the TA as to your design decision when they check you off.
  3. Using your logic from task 2, construct your circuit that will identify a "Fibonacci Number" on the prototyping board by connecting the inputs to switches and the output to an LED.  You will need 4 switches and 1 LED for this part. Please use: SW1 through SW4 for number value, and LED1 for the result.  Here are the chip maps.  Demonstrate your circuit to a TA and have them check you off as having completed this laboratory assignment. They may ask you to show them your work and explain your circuit. HINT: If you circuit is not working as expected use the logic probe to trace through the circuit from this inputs to the output, checking the observed logic at each step, to help you identify any wiring errors  



 Lab Demonstration/Turn-in Requirements: A TA will "check you off" after you:

  1. Finish step 3.

Comments to: cse370-webmaster@cs