This exercise will give you a chance to deal with an ALU or Arithmetic
Logic Unit. As the name suggests, an ALU is the part of the processor that
does the actual computations. In the book, section 5.7 covers the design and
implementation of a small ALU. To keep things tractable, you can
design a single-bit ALU and then connect up an arbitrary number of these
bit-slices to create full-size ALUs. The goal of this problem is to
modify the provided bit-slice to support carry-lookahead addition.
Specifically, you should:
- Download this file which contains an archived
design with several useful files. To use this design, Open a workspace in Active and
select Design->Restore Design and follow the instructions.
- Create a single bit ALU that produces the same F output as the one in
Instead of generating Cout, your bit-slice should produce P and G outputs suitable for
a carry lookahead unit.
- Make a 4-bit Alu from 4 of your one-bit ALUs and the carry-lookahead unit from HW5.
- Add your 4-bit adder to alu_test.bde and simulate it.
Submit a printout of your bit-slice schematic, and the console input from the successful simulation