CSE370 Laboratory Assignment 3
Constructing Simple Logic Circuits
Distributed: January 17, 2005
Due: Thursday (January 20, 2005) at 5pm
Objectives
In this lab you will apply your minimization
skills to realize two circuits to detect a Fibonacci number. You
will also apply your Active-HDL 6.2 skills to construct and
verify your Fibonacci detection circuits and use an XOR gate to detect
differences between your two circuits. By the end of this lab you should feel
comfortable that you can enter a schematic for a design, set up simulation
stimuli, and verify that your circuit is correct. After verifying your
circuits in simulation you will wire up both of your detection circuits on
the prototyping board.
Refer back to Tutorial #1 for help with Aldec Active-HDL
6.2
Tasks
-
Realize two circuits to detect a Fibonacci number between 1 and 15
(1, 2, 3, 5, 8, 13). One circuit should consider the number "0" a don't care
value while the second circuit should be completed without don't
cares (i.e. the number zero should be considered false). Make sure to
minimize each circuit by using K-maps. NOTE: You will need to
wire up BOTH circuits at the same time on your prototyping board so you should
be careful with your gate choice when realizing your circuits. Keep this
in mind as you may have to change the gates you use as you will be
required to use ONLY the gates in your prototyping kit and you only have
1 chip for each gate type with the exception of an inverter chip which you
should have two. Link to chips in your kit
-
Create a schematic in Active-HDL that includes both of your Fibonacci
number detection circuits. Connect the outputs of both your circuits to a
XOR gate to detect when the circuits behave differently. Make sure to
verify that you have enough gates in your prototyping kit when making the
schematic so you can wire up the identical circuit. NOTE: The gates in
your Active-HDL solution must exactly match the gates used
in your prototyping board solution.
-
Simulate both of your Fibonacci number detection circuits using the same
technique as in the tutorial #1. Create stimulators for the inputs A, B,
C, and D with D changing every 20 time units, C every 40, B every 80, and A
every 160. Make sure to run your simulation long enough so that the
inputs take on all possible combinations. Your simulation results should
clearly show that the output of the function is only true when the inputs
correspond to a Fibonacci number (1, 2, 3, 5, 8, or 13). Your waveform
should display 7 items: the 4 inputs (A, B, C, D), the output from your
XOR gate, and the two "wire/nets" (with_dont_cares/without_dont_cares) that
connect each detection circuit to the XOR gate. Please refer to
tutorial #1 to review how to name "wires/nets" or setup simulation
stimuli. Follow the print instructions
to print both your schematic and waveform on letter paper.
-
Using the schematic from task 2, construct
both of your circuits that will identify a "Fibonacci
Number" on the prototyping board by connecting the inputs to
switches and the output of the XOR to an LED. In
addition connect the results of the two detection circuits to LEDs. You
will need 4 switches and 3 LEDs for this part. Please use:
SW1 through SW4 for number value, LED1 for the XOR result, LED2 for
the without don't cares result, and LED 3 for the with don't cares
result. Demonstrate your circuit to a TA and have them check you off as having
completed this laboratory assignment. They may ask you to show them your work
and explain your circuit. HINT: If you circuit is not working
as expected use the logic probe to trace through the circuit to help you
identify any wiring errors
Lab
Demonstration/Turn-in Requirements: A TA will "check you off"
after you
-
Demonstrate your "Fibonacci Number" detection circuit.
-
Hand in the printout of your schematic and simulation output from Active-HDL
from task 3.
NOTE:
The gates in your Active-HDL solution must exactly match
the gates used in your prototyping board solution.
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