CS 370 – Spring 2005
Introduction to Digital Design
Instructor: Carl Ebeling

Homework Set 5

DUE: May 6, Start of class

Collaboration Policy:
Unless otherwise noted, you may collaborate with other CSE370 students on the homework assignments. Do not look at homework or exam solutions from previous years. You must spend at least 15 minutes working on a problem before seeking assistance. Collaboration means that you may discuss the problems and make notes during the discussion, but you may not look at other student’s work when writing up your homework. Your homework represents your own work—the homework must show that you understand the material and have worked as an individual on every problem. You may not divide up the task of doing the problem sets in the interpretation of collaboration. You may discuss lecture material with anyone.

Late Homework Policy:
The weekly assignments are due at the beginning of class. Assignments handed in
during or immediately after class will incur a 10% penalty. We will penalize your assignment 10% per day for each additional day late.

Please show all of your work. Your solutions must be legible…we will not spend time trying to decipher poorly written assignments.

The test fixtures for this homework are linked here and are in the course hw5 folder.

1. (50 points) By the end of the quarter, you will have designed yourself a simple processor.  The first component of that processor is an ALU that you will design here.  Make sure you keep this design so you can use it later.

Using Active-HDL, design and test a 16-bit ALU that executes the functions described in the following table.  The OP Code has three bits and tells the ALU which operation to perform on the two inputs, A and B.  Note that only six of the possible eight OP codes are used.


ALU result

OP Code


A + B



B - A



A + 1


Pass A









Design your ALU using a bit-slice approach.  That is, design a single bit of the ALU that can be copied N times to create an N-bit ALU.  You should start with the carry-lookahead adder you designed for the last homework, and just replace the 1-bit adder with the ALU slice you design here.  The carry-lookahead part of that circuit will compute all the carries for you. You should be able to implement the functions given here using that ALU. Although I have chosen the OP Code to make things somewhat easy, you will have to convert this 3-bit OP Code defined here into the control bits that your ALU needs.

You may add extra functionality to your ALU by increasing the number of op codes and op code bits.  If you do this, then you will also have to extend the test fixture to handle your ALU - I can help you with this if you decide to go this route.

2. (25 points) Complete the timing diagram below for the following circuit using hand simulation. Assume that gates and inverters have a delay of 1ns, and that the propagation delay of the register is 2ns. The vertical lines mark 1ns time; thus the clock cycle is 10ns.

a) Draw a state diagram that describes the operation of this circuit.

3. (20 points)  Check out the problem2 design in the course hw5 folder.  This is your first circuit with a register in it.  Run this circuit by executing in steps of 5ns.  What does this circuit do?  Modify this circuit so that it produces a 1 on the output when it sees 4 consecutives 1's on the input.  Test using the test fixture problem2a_tf.  Hand in a screen shot of your circuit along with the console showing that your circuit works.

4. (20 points) Draw the state diagram corresponding to the following circuit.