CS 370
– Spring 2005

Introduction to Digital
Design

Instructor: Carl Ebeling

Homework Set 2

**DISTRIBUTED: April 6
DUE: April 15, Start of class
**

Unless otherwise noted, you may collaborate with other CSE370 students on the homework assignments. Do not look at homework or exam solutions from previous years. You must spend at least 15 minutes working on a problem before seeking assistance. Collaboration means that you may discuss the problems and make notes during the discussion, but you may not look at other student’s work when writing up your homework. Your homework represents your own work—the homework must show that you understand the material and have worked as an individual on every problem. You may not divide up the task of doing the problem sets in the interpretation of collaboration. You may discuss lecture material with anyone.

**Late Homework Policy:**

The weekly assignments are due at the beginning of class. Assignments handed in
during or immediately after class will incur a 10% penalty. We will penalize
your assignment 10% per day for each additional day late.

Please show *all* of your work. Your
solutions must be legible…we will not spend time trying to decipher
poorly written assignments.

1. (5 pts) Text 2.20

2. (8 pts) Text 2.21

3. (12 pts) Text 2.22

4. (10 pts) Text 2.26: a, c

5. (5 pts) Text 2.31: a, b

6. (8 pts) Text 2.38

7. (12 points)

a) Translate this circuit directly to a Boolean
expression that computes the same function.

b) Express this function as a canonical Sum of Products.

c) Express this function as a canonical Product of Sums.

d) Using a K-map, find the minimal Sum of Products
expression for this function.

e) Using a K-map, find the minimal Product of Sums
expression for this function.

f) Draw the circuit corresponding to the minimal Sum of
Products representation.

8. (10 points)

a) Redraw this circuit using the deMorgan equivalent for
gates where appropriate so that the function computed can be read directly from
the circuit diagram.

b) Find the minimal Sum of Products form for this function.

c) Draw the circuit for this minimal Sum of Products using
only NAND gates (and inverters).

d) Draw the circuit for this minimal Sum of Products using
only NOR gates (and inverters).

9. (20 points) By now you should be familiar with using the AldecHDL
tools from readhing Tutorial #1
.

Go to the class folder for
this homework (\\ntdfs\cs\cse\courses\cse370\05sp\hw2) where you will find a design that you should import into your workspace. You
do this from within Active-HDL by clicking on the Add New File icon, then
clicking on the Add Existing File button. Browse to this folder and
choose the hw2.bde file to import. What you will see is the circuit
below. As you see, the circuit on the left implements the eight minterms
for a function of three variables, and the circuit on the right implements the
eight maxterms.

Import the hw2.awf file into your workspace. This file
contains the simulation information for this circuit. Compile the circuit
first, select it as the top level and initialize the simulator. Bring up the
hw2.awf file. To run the simulation, first set the simulation run time to
5ns. Run once to advance time to 5ns. The inputs should change to 0
0 0. Now change the simulation run time to 10ns. Each time you run
the simulation now, the inputs should advance to the next value. (A has
been connected to a 3-bit counter stimulator.)

Implement two different Full Adder circuits, one using a
canonical Sum of Products and the other using a canonical Product of Sums.
Create a full adder by adding two OR gates (one which will implement the
SUM function and one which will implement the Carry Out function) to the
circuit at left. Then do the same by adding two AND gates to the circuit
at right.

Run the simulation again as described above and watch how
the two circuits implement this function.

Turn in a printout of your circuit schematic (fit to one
page please!), and the simulation window.