CSE370 Assignment 9
Unless otherwise noted, you may collaborate with other CSE370 students on the homework
assignments. Do not look at homework or exam solutions from previous years. You
must spend at least 15 minutes working on a problem before seeking assistance.
Collaboration means that you may discuss the problems and make notes during the
discussion, but you may not look at other student’s work when writing up
your homework. Your homework represents your own work—the homework must
show that you understand the material and have worked as an individual on every
problem. You may not divide up the task of doing the problem sets in the
interpretation of collaboration. You may discuss lecture material with anyone.
- Computer Organization
- The MIPS2000 processor is a simplified version of the one described in Patterson & Hennessy's Computer Organization and Design, 3rd edition, Morgan-Kaufmann. There should be plenty around the department as this is the CSE378 textbook
- MAKE A COPY OF YOUR SOLUTION FOR THIS ASSIGNMENT AS YOU WILL NEED IT TO COMPLETE THE NEXT ASSIGNMENT.
- We updated the machine from the last homework, and it can be downloaded here. After you download the zip file, open Aldec, Select Workspace > Restore Workspace from the menu, and browse to the zip file. The restored project contains all the commented Verilog files you'll need to determine the detailed operation of the processor's data-path.
- For homework 8 we asked you to determine the control signals necessary for 11 basic instructions. Now, we want you to actually implement the controller using these control values. Please use the skeleton code provided. Note: Additional logic has been added, meaning that some control signals are larger than before. Where possible I tried to maintain the original mapping, but you should double-check against the actual code
- We have added 4 new instructions described below, please implement them as well.
|Or Immediate||Imm||ORI|| rt = rs[31:16],(rs[15:0] | immed[15:0]);PC++|
|Load Upper Immed.||Imm||LUI|| rt = immed[15:0],zeros[15:0];PC++|
|Jump Register ||Reg||JR|| PC=rs|
|Jump and Link ||Jmp||JAL|| r31=PC+1; PC = PC[31:26],Inst[26:0]|
- The file imemory_hanoi.v contains an implementation of the "Towers of Hanoi". The number of discs is read from dmemory. Once your controller is ready, be sure to set a stimulator for clk (use 40ns).Note: this is a recursive implementation that stores info in dmem for each "call". Therefore, if you use too many discs, memory will overflow and things will stop working. You can fix this by increasing the size of memory in dmemory.v, and the number of bits of address used.
- To turnin your project, use ActiveHDL's Archive Workspace command to generate a .zip file containing all the files that will be needed to run the project. Then, move it to someplace on attu, and run the command 'turnin -c cse370 <filename>' to submit your project for grading. The turnin system will shut down at 12 am on December 10th. This means that you can submit your project at any time during the day of December 9th, but no later.
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