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CSE370 Assignment 4

### Distributed: 26 January 2004

Due: 3 February 2004

#### Reading:

- Katz/Borriello, Contemporary Logic Design, Chapter 4 (skip
material on FPGAs)

#### Exercises:

- CLD-II, Chapter 3, problem 3.22, all parts.
- CLD-II, Chapter 4, problem 4.2.
- CLD-II, Chapter 4, problem 4.6.
- CLD-II, Chapter 4, problem 4.8 (use this template).
- CLD-II, Chapter 4, problem 4.11.

#### Rationale:

- To practice realizing combinational logic using regular logic
structures.
- To begin to understand the process of mapping logic to
programmable logic devices.

Comments to: cse370-webmaster@cs.washington.edu