CSE370 Assignment 4

Distributed: 26 January 2004
Due: 3 February 2004

Reading:

1. Katz/Borriello, Contemporary Logic Design, Chapter 4 (skip material on FPGAs)
   

Exercises:

1. CLD-II, Chapter 3, problem 3.22, all parts.
2. CLD-II, Chapter 4, problem 4.2.
3. CLD-II, Chapter 4, problem 4.6.
4. CLD-II, Chapter 4, problem 4.8 (use this template).
5. CLD-II, Chapter 4, problem 4.11.

Rationale:

• To practice realizing combinational logic using regular logic structures.
• To begin to understand the process of mapping logic to programmable logic devices.