Due: 29 October 2004

For problems 1 and 2, you may print the ROM, PLA and PAL worksheets or the worksheet which has all three on one page.

1. Use the accompanying worksheets to implement the following
set of functions using a ROM, a PLA and a PAL. That is, use a ROM
to
implement all three functions, then a PLA to implement all three, and
finally a
PAL. For the PLA, try to reduce the number of AND gates you use.

Make sure you identify your solutions.

f1(a,b,c,d) = a’d + bd + a’bc

f2(a,b,c,d) = ad + b’d + a’bcd’

f3(a,b,c,d) = ac’ + a’c + bcd

2. Use the ROM, PLA and PAL worksheets to implement the following set of functions, represented using the SOP shorthand. Again for the PLA, try to reduce the number of AND gates you use.

f1(a,b,c,d) = ∑ m(8, 4, 12, 14, 13) + d(10, 6)

f2(a,b,c,d) = ∑ m(10, 12, 14) + d(6)

f3(a,b,c,d) = ∑ m(10, 4, 11, 13, 15) + d(9, 7)

3. Using Active-HDL, implement a 4-16 decoder
using five 2-4 decoders. You will find a test fixture **here**. Hand in the
schematic for your circuit plus the test results of the
simulation.

4. Using Active-HDL, implement a 16-1
multiplexor using five 4-1 multiplexors.
You will find a test fixture **here**. Hand in the
schematic for your circuit plus the test results of the simulation.

5. Using Active-HDL, design and test an 8-bit
shifter circuit that implements the C/Java >> (arithmetic shift
right)
operation. The circuit has two inputs: an 8-bit data input and a
3-bit
shift amount input. The 8-bit output value is the input, shifted
right by
the shift amount. (This implements divide by a power of 2.) Make
sure
your circuit works for both positive and negative
numbers (2's complement
representation). Here are some example inputs and outputs:

Din[7:0] |
shift[2:0] |
Result[7:0] |

00100100 (36) |
010 (2) |
00001001 (9) |

00100100 (36) |
101 (5) |
00000001 (1) |

11101100 (-20) |
001 (1) |
11110110 (-10) |

11101100 (-20) |
010 (2) |
11111011 (-5) |

10000000 (-128) |
011 (3) |
11110000 (-16) |

10000000 (-128) |
111 (7) |
11111111 (-1) |

You will find a test fixture **here**. Hand in the schematic for
your circuit plus the test results of the simulation.

- To practice realizing combinational logic using regular logic structures.
- To begin to understand the process of mapping logic to programmable logic devices.

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