CSE370 Assignment 8

Distributed: 19 November 2003
Due: 26 November 2003

Reading:

1. Katz/Borriello, Contemporary Logic Design, Chapter 9 (skip sections 9.4 and 9.5.4 on FPGAs)
   
2. Katz/Borriello, Contemporary Logic Design, Chapter 8 (begin reading)

Exercises:

1. By hand, synthesize the sequential logic for the Light Game state machine discussed in class on Nov 19. Include the logic for converting the push button inputs (LPB and RPB) into single clock pulse signals (L and R). Also, make sure that your implementation of the game is fair. Will your implementation fit into a single 22V10 PAL? How does it compare to what was synthesized in Laboratory Assignment #7.
2. CLD-II, Chapter 9, problem 9.9.

Rationale:

• To implement several small finite state machines and exercise the design procedure.
• To learn how to map FSM implementations to programmable logic devices.