Introduction to Digital Design

Instructor: Carl Ebeling

Homework Set 8

**DUE: Wednesday Dec. 4****
, 2002, Start of class**

**Collaboration Policy:**

Unless otherwise noted, you may collaborate with other CSE370 students on the homework assignments. Do not look at homework or exam solutions from previous years. You must spend at least 15 minutes working on a problem before seeking assistance. Collaboration means that you may discuss the problems and make notes during the discussion, but you may not look at other student’s work when writing up your homework. Your homework represents your own work—the homework must show that you understand the material and have worked as an individual on every problem. You may not divide up the task of doing the problem sets in the interpretation of collaboration. You may discuss lecture material with anyone.

**Late Homework Policy:**

The weekly assignments are due at the beginning of class. Assignments handed in during or immediately after class will incur a 10% penalty. Your assignment will be penalized 10% per day for each additional day late. Assignments due Friday will be charged 20% if turned in over the weekend, 30% if turned in on Monday, etc.

Please show *all* of your work.Your solutions must be legible…we will
not spend time trying to decipher poorly written assignments.

**Changes appear in RED.**

1. (50 points) Design a serial comparator that compares two input numbers, one bit at a time, and produces one output number, one bit at a time, which is the larger of the two inputs. A third input, INIT, is asserted when the first bits of the two input numbers are presented.

Example (reading left to right):

INIT: 100000010000000

A: 110010000101100

B: 110101100100111

------------------------

OUTPUT: 110101100101100

Do two different designs, one that encodes the states and one that uses a 1-hot state encoding. Do the entire design, including state diagram, state assignment, state table, equations and final circuit. You do not need to simulate it.

2. (50 points) Design the following interlock system for a turbine starting control system. There are six control inputs: Two keys, KEY1 and KEY2, indicate which turbine is to be started, an ARM button is used to initialize the system, and two sensors, SPEED and POWER, determine whether the speed and voltage to the turbine is sufficient for starting it, and a START button that turns on the final power to the turbine. There are two outputs, ENG1 and ENG2, which actually cause power to be turned on to either turbine 1 or turbine 2 depending on which key was turned on.

The starting sequence must be exactly as follows: Either KEY1 or KEY2 is asserted (while ARM and START are off), followed by the ARM button being pressed, followed by both SPEED and POWER sensors being asserted, followed by the START button being pushed. If the starting sequence is followed, then either ENG1 or ENG2 is asserted depending on which key was used. The outputs are deasserted if at any time SPEED, POWER or the KEY is deasserted. The ARM and START buttons are momentary, that is, they may turn off some time after being asserted.

a) Design a state diagram to describe a state machine solution to this problem. Draw this diagram carefully, clearly labelling all states and transitions. You might consider factoring your state machine.

b) Choose a state encoding and a state assignment, and label the state diagram clearly.

c) Write down the state transition truth table.

d) [Extra credit] Write down the output equations and next state equations.
If you encode the states "nicely", this will be easy.

3. (100 points) Design the x370 Model 1. This involves adding
the Load Immediate instruction to the x370 Model 0, which we will give you.
We will also give you a program to test your resulting processor design.
You should turn in a copy of your schematics, plus a screen shot showing
the contents of your register file at the end of simulation.