CS 370 - Autumn 2002
Introduction to Digital Design
Instructor: Carl Ebeling

Homework Set 6
DUE: Friday, Nov. 15 , 2002, Start of class
 

Collaboration Policy:

Unless otherwise noted, you may collaborate with other CSE370 students on the homework assignments. Do not look at homework or exam solutions from previous years. You must spend at least 15 minutes working on a problem before seeking assistance. Collaboration means that you may discuss the problems and make notes during the discussion, but you may not look at other student’s work when writing up your homework. Your homework represents your own work—the homework must show that you understand the material and have worked as an individual on every problem. You may not divide up the task of doing the problem sets in the interpretation of collaboration. You may discuss lecture material with anyone.

Late Homework Policy:

The weekly assignments are due at the beginning of class. Assignments handed in during or immediately after class will incur a 10% penalty. We will penalize your assignment 10% per day for each additional day late.

Please show all of your work.Your solutions must be legible…we will not spend time trying to decipher poorly written assignments.

Changes appear in RED.


1. (50 points) Design and test, using Active-HDL, a 16-bit ALU that executes the functions described in the following table.  The OP Code has three bits and tells the ALU which operation to perform on the two inputs, A and B.  Note that only six of the possible eight OP codes are used.

Operation
ALU result
OP Code
ADD
A + B
0
SUB
B - A
6
INC
A + 1
2
Pass A
A
3
XOR
A XOR B
1
XNOR
A XNOR B
5

Design your ALU using a bit-slice approach.  That is, design a single bit of the ALU that can be copied N times to create an N-bit ALU.  If base your ALU on a carry-lookahead adder, then you will add the carry-lookahead components from HW5 to provide the carries.  If you use a simple ripple-carry adder, then the bit-slice can compute the carry out to the next bit position just like the simple full-adder circuit.  [You may use any adder circuit as the basis for your ALU, but if you use slow adder like a ripple-carry adder, you will have to slow down the test fixture circuit.]

HINT: Look at the notes for the ALU bit-slice we designed in class.  See how you can implement the functions given here using that ALU.  Although I have chosen the OP Code to make things somewhat easy, you will have to convert this 3-bit OP Code to the longer op code that the ALU needs.  If you start with the carry-lookahead adder you designed for HW5, you should be able to just replace the 1-bit adder with the ALU slice you design here, and add the op code.

You may add extra functionality to your ALU by increasing the number of op codes and op code bits.  If you do this, then you will also have to extend the test fixture to handle your ALU - I can help you with this if you decide to go this route.

2. (20 points)  Check out the problem2 design in the HW6 folder.  This is your first circuit with a register in it.  Run this circuit by executing in steps of 5ns.  What does this circuit do?  Modify this circuit so that it produces a 1 on the output when it sees 4 consecutives 1's on the input.  Test using the test fixture problem2a_tf.  Hand in a screen shot of your circuit along with the console showing that your circuit works.

3. (20 points) Check out the problem3 design in the HW6 folder.  Run this circuit by executing in steps of 5ns.  What does this circuit do?  Change this circuit so that it performs the "opposite" function.  Test using the test fixture problem3a_tf.  Hand in a screen shot of your circuit along with the console showing that your circuit works.