CS 370 - Autumn 2002
Introduction to Digital Design
Instructor: Carl Ebeling

Homework Set 2
DUE: Oct. 18, 2002, Start of class

Collaboration Policy:

Unless otherwise noted, you may collaborate with other CSE370 students on the homework assignments. Do not look at homework or exam solutions from previous years. You must spend at least 15 minutes working on a problem before seeking assistance. Collaboration means that you may discuss the problems and make notes during the discussion, but you may not look at other student’s work when writing up your homework. Your homework represents your own work—the homework must show that you understand the material and have worked as an individual on every problem. You may not divide up the task of doing the problem sets in the interpretation of collaboration. You may discuss lecture material with anyone.

Late Homework Policy:

The weekly assignments are due at the beginning of class. Assignments handed in during or immediately after class will incur a 10% penalty. We will penalize your assignment 10% per day for each additional day late.

Please show all of your work.Your solutions must be legible…we will not spend time trying to decipher poorly written assignments.

1. (4 pts) Katz 2.20

2. (8 pts) Katz 2.21

3. (12 pts) Katz 2.22
b, c, d: Use K-maps to do the minimization
e, f: Implement only F (not F') using your minimized result

 4. (6 pts) Katz 2.23: a, b

5. (10 pts) Katz 2.25: a, b

6. (10 pts) Katz 2.26: b, d

7. (5 pts)  Katz 2.29: c

8. (10 pts) Show that the NAND gate forms a complete set of gates by showing how AND, OR, and INVERT can each be implemented using only NAND gates.

9. (10 points)
circuit diagram
    a) Redraw this circuit using the deMorgan equivalent for gates where appropriate so that the function computed can be read directly from the circuit diagram.
    b) Find the minimal Sum of Products form for this function.
    c) Draw the circuit for this minimal Sum of Products using only NAND gates (and inverters).
    d) Draw the circuit for this minimal Sum of Products using only NOR gates (and inverters).
  10. (15 points)

circuit diagram

    a) Translate this circuit directly to a Boolean expression that computes the same function.
    b) Express this function as a canonical Sum of Products.
    c) Express this function as a canonical Product of Sums.
    d) Using a K-map, find the minimal Sum of Products expression for this function.
    e) Using a K-map, find the minimal Product of Sums expression for this function.
    f) Draw the circuit corresponding to the minimal Sum of Products representation.

Introduction to the Active-HDL CAD Tools :  Tutorial #1 gives a gentle introduction to the Active-HDL program.
Work through this tutorial, making sure you understand everything that it covers.  This should take you about 2 hours.
Please, if you run into problems, send us email or try to find us.  If you have comments on how to make the Tutorial better, please send me email.

11. (20 points)  Design a circuit that compares two 2-bit numbers and outputs a 1 if the first number is greater than the second.  These 2-bit numbers are special in that only the numbers 0,1, and 2 are used.  That is, the number 3 never happens so the circuit can output anything if either input number is a 3.  You will want your circuit to be as small as possible.
    Draw a schematic for this circuit using Active-HDL.  Using stimulators as shown in Tutorial #1, simulate this circuit for all possible input values, and show that your circuit computes the right values.
    Hand in the printout of your schematic and simulation output.

12. (20 points)  Go to the class folder for this homework (\\ntdfs\cs\cse\courses\cse370\02au\hw2) where you will find a design that you should import into your workspace.  You do this from within Active-HDL by clicking on the Add New File icon, then clicking on the Add Existing File button.  Browse to this folder and choose the hw2.bde file to import.  What you will see is the circuit below.  As you see, the circuit on the left implements the eight minterms for a function of three variables, and the circuit on the right implements the eight maxterms.
    Import the hw3.awf file into your workspace.  This file contains the simulation information for this circuit. Compile the circuit first, select it as the top level and initialize the simulator. Bring up the hw3.awf file.  To run the simulation, first set the simulation run time to 5ns.  Run once to advance time to 5ns.  The inputs should change to 0 0 0.  Now change the simulation run time to 10ns.  Each time you run the simulation now, the inputs should advance to the next value.  (A has been connected to a 3-bit counter stimulator.)
    Implement two different Full Adder circuits, one using a canonical Sum of Products and the other using a canonical Product of Sums.  You should do this by adding two OR gates to the circuit on the left, and two AND gates to the circuit on the right.
    Run the simulation again as described above and watch how the two circuits implement this function.
    Turn in a printout of your circuit schematic (fit to one page please!), and the simulation window.

circuit diagram