There will be no eating or drinking in the laboratory and you are expected to behave civilly at all times.
These Intel PCs were generously donated to the department by Intel Corporation of Hillsboro, OR.
This software was donated to the department by Microsoft Corporation of Redmond, WA.
For the entire quarter, we will be using DesignWorks, a schematic capture and simulation tool from Capilano Computing. It also contains limited Verilog support, which we will use later in the quarter. You will use these tools to specify, and simulate your design and will incorporate schematics and simulator output into the write-up of your assignments.
DesignWorks Quick-start Tutorial
Please refer to the DesignWorks quick-start notes that John Naegle has created for CSE370. These help pages will be a valuable reference resource throughout the quarter, providing help on schematic drawing, simulation, verilog, tips and known bugs.
DesignWorks At Home:
If you wish to use DesignWorks on your home computer, Capilano offers a free trial demo of DesignWorks 3.2 schematic capture and simulation here (as of 3/29/99). You may also need some useful libraries. Be sure to choose the full demo version and not the small or lite versions, as they don't have as many features we will be using. However, be sure to become familiar with DesignWorks in the Sieg PC labs and be able to transfer files between your home computer and the lab PCs, because computing support will not be provided for at home work. Also, note that the verilog component, and possibly other features, are not provided in this demo version, so for some later assignments you MUST use DesignWorks in the labs.
Refer to the CSE370 verilog resource page for suggested help with the verilog language.
DesignWorks has several reference manuals viewable with Adobe Acrobat Reader 3.0 (or newer, presumably), which are also available on the CSE department's instructional PCs:
If you're on one of the CSE department's instructional PCs, the manuals are also in a directory on the file server.