Table of ContentsComputer organization Structure of a computer Registers Register transfer Register files Memories Instruction sequencing Instruction types Elements of the control unit (aka instruction unit) Instruction execution Data path (heirarchy) Data path (ALU) Data path (ALU + registers) Data path (bit-slice) Instruction path Data path (memory interface) Block diagram of processor Block diagram of processor A simplified processor data-path and memory Processor control Processor instructions Tracing an instruction's execution Tracing an instruction's execution (cont’d) Tracing an instruction's execution (cont’d) Tracing an instruction's execution (cont’d) Tracing an instruction's execution (cont’d) Register-transfer-level description Register-transfer-level description (cont’d) Review of FSM timing FSM controller for CPU (skeletal Moore FSM) FSM controller for CPU (reset and inst. fetch) FSM controller for CPU (decode) FSM controller for CPU (instruction execution) FSM controller for CPU (add instruction) FSM controller for CPU |
Author: Gaetano Borriello |