The block you need to design looks like this:
It will take two 4-bit unsigned numbers, and compare them. There are
8 inputs, which are the bits of the two numbers to compare: A3..0 is one
number and B3..0 is another (A0 is the lsb, A3 is the msb). There are three
outputs: G is asserted iff A > B, E is asserted iff A=B and L is asserted
iff A < B (there is never more than one output asserted at once)
You start writing the truth table for this, but you quickly realize that there are 8 variables, so that’s 256 rows in the truth tables. And on top of that, those K-maps that were advocated so much in CSE370 back when you were in school don’t make it easy to work on 8 variables!!! So, you decide to start with a smaller more manageable problem, say that of comparing two 2-bit numbers.
a) Design the following 2-bit UComp component, which has the exact same specification as above, except that A and B are only 2-bit numbers (design here means do a truth table, use K-maps to minimize, and draw the resulting circuit)
b) Show how you would construct the 4-bit UComp block using two 2-bit UComp
blocks, and a third block with 6 inputs and 3 outputs (you do not need
to design the 6 input block, just say what it does)
All you need to do now is design the block with 6 inputs! This is doable with K-maps, you say… But real designers like you don’t waste their time doing 6 variable K-maps! They find better solutions. Thus:
c) Design a new 2-bit UComp block which has only 2 outputs (hint: let your outputs be Y1 and Y0, and have Y0Y1 = 00 mean smaller, Y0Y1 = 01 mean equal and Y0Y1 = 10 mean greater).
d) Do b) again, but this time use two 2-bit UComp blocks and a third block with 4 inputs, and 3 outputs. Design this third block using truth tables and K-maps.
Great! Now, you’ve done the design for this new comparator. Your boss really likes the design, but isn’t impressed enough to give you a bonus. So you keep on thinking about the problem, in the hope of finding something better (something, shall we say, bonus-enducing?). Finally, you come up with this incredible idea: the Bit Slice UComp, or BSUComp for short (show below).
The BSUComp compares two n-bit numbers, of which the least significant
bits are A0 and B0. What, you say? How can we compare two n-bit numbers
according to only the lsb? Well, notice that there are two additional inputs.
These two inputs (encoded according to part d) will give you the result
of comparing all the bits in A and B that are more significant than the
lsb.
e) Design the BSUComp block (using, you’ve guessed it, truth tables and K-maps. Hope you’re seeing a pattern here about what the design process is…)
f) Show how you would construct a 4-bit UComp block using four BSUComp blocks and a block with 2 inputs and 3 outputs. Design this 2 input, 3 output block (using what?… you’ve guessed it, truth tables and K-maps, of course)
g) What is the gate count and the propagation delay of the 4-bit UComp blocks that you have designed so far (the one in part d and in part f)
h) Given the results from part g, you decide not to show the Bit Slice design to your boss. One of your colleagues though, comes up with the same exact idea (BSUComp, etc.), and decides to pompously present it at the group meeting. The next day, this colleague of yours is fired! BUT, as luck would have it, the day after getting fired, your colleague gets a job at SFEC inc. (Slow but Flexible and Extensible Chips). What happened? (Hint: What happens when the Zentium ™ branch prediction engine makes the fantastic leap to 6 bits? What about 8 bits?)