CSE370 Assignment 2

Distributed: 31 March 2000
Due: 7 April 2000

Reading:

1. Katz, Chapter 2 revised - handout.
2. (Optional) Katz, Chapter 2 (pp. 40-85 and 92-102).

Exercises:

1. Katz exercise 2.2 without using inverters (only 2-input NOR gates).  Draw the schematic in DesignWorks and verify its operation by exercising all input combinations using a set of three switches. Turn in the schematic drawing.
2. Prove the expression in Katz exercise 2.7 (a,c) using the truth-table method.
3. Prove the theorem (x'+y')(y'+z')(x+z')=(x'+y')(x+z') using the laws of Boolean algebra.
4. Katz exercise 2.10 (e,f).
5. Katz exercise 2.12 (do the verification in DesignWorks using switches at the X and Y inputs and a probe at the output). Turn in the schematic drawing.
6. Demonstrate that a two-input NAND gate is a universal logic element. You can do this by showing how they can be used to make: NOT, AND, OR, and XOR gates. Is an XOR gate a universal logic element? Why or why not?
7. Consider the function f(A, B, C, D) = Sm(0, 3, 4, 7, 9, 11, 12, 13).
   (a) Write this as a Boolean expression in canonical minterm form.
   (b) Rewrite the expression in canonical maxterm form.
   (c) Write the complement of f in "little m" notation and as a canonical minterm expression.
   (d) Write the complement of f in "big M" notation and as a canonical maxterm expression.
8. Consider the function f(X, Y, Z) = XY + YZ + X'Z
   (a) Express the function in canonical sum-of-products form.  Use "little m" notation.
   (b) Express the complement of the function in canonical product-of-sums form.  Use "big M" notation.

Rationale:

• To practice and gain facility with Boolean algebra and canonical forms.
• To start using a logic schematic diagram editor and simulator.