Title: CSE 351 23au / LS25 Virtual Memory II

Q: What do we call the fixed-width unit of data transfer between physical memory and disk?
A: page

Q: P = 2^p represents the ___, where we need p bits to reference every byte in a page.
A: page size

Q: The leftmost bits of the physical address that uniquely identify the page in the physical address space is the ___
A: physical page number (PPN)

Q: The leftmost bits of the virtual address that uniquely identify the page int he virtual address space is the ___
A: virtual page number (VPN)

Q: When all processes on the computer exceed the amount of physical memory, what state does it go into?
A: thrashing

Q: The rightmost bits of the virtual or physical address that give the position within the page where that address resides is known as the ___
A: page offset

Q: How many page tables does each process have?
A: one

Q: In address translation, the page table translates the ___ to the ___ (PPN, VPN)
A: physical page number to the virtual page number

Q: In the context of caching, what is a page table entry conceptually similar to?
A: Cache line
The PTE stores the page table entry (PTE) rather than the block of data

Q: In a page table entry, what does the valid bit mean?
A: Whether or not the translation exists (i.e., is this virtual page actually stored in physical memory?)

Q: In a page table entry, what does the dirty bit mean?
A: Physical memory is write-back, though this bit is only relevant if a copy of the page exists in the swap space too

Q: What does PTBR stand for?
A: page table base register

Q: True or false: The page table base register is a special register that holds the physical address of the current process’ page table
A: True
It's used to access the page table and is updated whenever a context switch occurs

Q: If the process’ requested page is in physical memory (i.e., valid bit is set to 1), we call it a page ___
A: page hit

Q: If the process’ requested page is not in physical memory, we call it a page ___
A: page fault

Q: What are the three extra management bits used to manage access rights?
A: Read (R), Write (W), Execute (X)

Q: Put the steps for address translation into the correct order
1. It indexes the page table using the VPN, checking the valid bit to ensure the page is resident in memory.
2. The MMU finds the physical memory address of the page table for the process by looking at the page table base register (PTBR).
3. It retrieves the PPN, glues it back together with the original offset, and sends the request for the new address to physical memory.
4. A process running on the CPU requests a virtual address
A: 4. A process running on the CPU requests a virtual address
2. The MMU finds the physical memory address of the page table for the process by looking at the page table base register (PTBR).
1. It indexes the page table using the VPN, checking the valid bit to ensure the page is resident in memory.
3. It retrieves the PPN, glues it back together with the original offset, and sends the request for the new address to physical memory.