#---------------------------------------------------------------------
# 4th makefile example: using an "implicit rule"
#                       (to generate a .o file from a .c file)
#---------------------------------------------------------------------

APP     = myApp.exe
CC      = gcc
CFLAGS = -c
LD      = gcc
LDFLAGS = -o $(APP) -lncurses


$(APP):  main.o a.o b.o
	$(LD) main.o a.o b.o $(LDFLAGS) 

main.o: main.c a.h b.h

a.o:	a.c a.h

b.o:	b.c b.h

%.o : %.c
	$(CC) $(CFLAGS) $<

clean:
	rm -f *~ *.o $(APP)