CSE 548 - Winter 2004
Computer Systems Architecture
Announcements:
Welcome!
Course handout/syllabus
(pdf)
Project
(pdf)
Homework
(pdf)
Note:
You should get the 3rd (most recent) edition of the H&P book
We have moved to MGH 234
Midterm Documents
the Midterm, Due Feb 11th at midnight
IA32 Optimization Guide
IA32 Optimization Manual
IA32 Reference Volume 1
IA32 Reference Volume 2
IA32 Reference Volume 3
Pentium4 Microarchitecture
Pentium4 Microarchitecture (Slides)
x86 ISA Reference
i386 ISA reference (text)
sample C code to illustrate inline assembly
Final exam:
Download from here
Readings and Lecture Notes
Monday 2/5
Introduction
Wednesday 2/7
The Engineering Design of the Strech Computer
H&P Appendix A.1 - A.4 (Weighted towards the front/skim the back).
Monday 2/12
Excerpts from Design of a Computer: the Control Data 6600
Parallel Operation in the Control Data 6600
Wednesday 2/14
An Efficient Algorithm for Exploiting Multiple Arithmetic Units
HPS, a new microarchitecture: rationale and introduction
Wednesday 2/21
A Preliminary Architecture for a Basic Data-flow Processor
Two Fundamental Limits on Dataflow Multiprocessing
Monday 2/26
Very Long Instruction Word Architectures and The ELI-512
Retrospective: The ELI-512
A Design Space Evaluation of Grid Processor Architectures
Wednesday 2/28
A Study of Branch Prediction Strategies
Retrospective: A Study of Branch Prediction Strategies
H&P Pages 196-215
(If you do not have the H&P book yet)
An Analysis of Correlation and Predictability: What Makes Two Level Branch Predictors Work
Optional:
A Language for Describing Predictors for Automatic Synthesis
Monday 2/2
Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching
Optional: Section in H&P about caches as background depending upon your prior experience
Wednesday 2/5
The Microarchitecture of SuperScalar Processors
Wednesday 2/18
Limits of Control Flow on Parallelism
Monday 2/23
Clock Rate versus IPC
Optimizing Pipelines for Power and Performance
Wednesday 2/25
Martha
Andrew
Atri & Parag
Monday 3/1
Charlie & Chris
Tyler & Benson
Lucas & Steve
Wednesday 3/3
Swapna & Daniel
Abhishek
Alex & Xu
Muthu & Bhushan
Monday 3/8
Cache Coherence Protocols: Evaluation using a Multiprocessor Simulation Model
Wednesday 3/10
Read the abstracts from the papers here