Lecture transparencies and
documentation and design-review guidelines
are also available.
Week |
Tuesday |
Thursday |
||
1 |
4/1 |
Introduction |
04/3 |
Microcontrollers
|
2 |
4/8 |
Microcontrollers (cont) |
4/10 |
Microcontrollers: Timers/Interrupts Due: Project decisions
(9:00 am 4/10) Project proposals Due 5:00
pm, Friday, 4/11) |
3 |
4/15 |
Microcontrollers (cont) |
4/17 |
Writing design documents |
4 |
4/22 |
Asynchronous interfaces Due: Architecture Definition (9:00 am 4/22) |
4/24 |
Architecture design review presentations: Noise canceling
and Iris recognition (videotaped?) |
5 |
4/29 |
Architecture design review presentations: Cell chemistry 1
& 2 (videotaped?) |
5/1 |
Video pipeline case study Due: Labs 1-2 (5:30 pm 5/1) |
6 |
5/6 |
Due: Revised Architecture Definition (9:00 am 5/6) |
5/8 |
Verilog for FSMs |
7 |
5/13 |
Verilog Logic Analyzers |
5/15 |
Verilog2001 |
8 |
5/20 |
Communication & Buses Due: Detailed design packages (9:00 am 5/15) |
5/22 |
Detailed design review presentations |
9 |
5/27 |
High-Speed Signaling Lecture |
5/29 |
Detailed design review presentations |
10 |
6/3 |
No class |
6/5 |
No class |
11 |
Wed. 6/11 |
10:30 Project presentations 12:30 Project demonstrations |
6/12 |
Due: Project reports and Project Brochures (5:00 pm
6/12) |