C51 COMPILER V6.00 DOOR                                                                    05/29/2001 18:52:39 PAGE 1   


C51 COMPILER 6.00, COMPILATION OF MODULE DOOR
OBJECT MODULE PLACED IN .\door.OBJ
COMPILER INVOKED BY: d:\app\keil\eval\C51\BIN\C51.EXE .\door.c BROWSE OBJECTEXTEND DEBUG

stmt level    source

   1          #include "../shared.h"
   2          #include "door.h"
   3          #include "sonar.h"
   4          #include "rf.h"
   5          #include "fpga.h"
   6          
   7          
   8          /* states and flags */
   9          unsigned char state = DETECTING_USER;
  10          //unsigned char state = CHECKING_ID;
  11          unsigned char badgeID = 0x41;	//A
  12          
  13          void main() 
  14          {
  15   1      	/* interrupt settings */
  16   1      	EA = 1;
  17   1      	EX1 = 1;
  18   1          for (;;) {
  19   2      		switch(state) {
  20   3      		case DETECTING_USER:
  21   3      		    Sonar_Task();
  22   3      		    break;
  23   3      		case REQUESTING_ID:
  24   3      			RF_Task();
  25   3      		    break;
  26   3      		case CHECKING_ID:
  27   3      		    FPGA_Task();
  28   3      			break;
  29   3      		default:
  30   3      			state = DETECTING_USER;
  31   3      		}//end switch
  32   2          }
  33   1      }/* end of main */
  34          
  35          
  36          void Ext0_ISR() interrupt 0 {
  37   1      	if(state == DETECTING_USER)
  38   1      		Sonar_Ext0_Handler();			
  39   1      
  40   1      //	else if(state == CHECKING_ID)
  41   1      //		FPGA_Ext1_Handler();			
  42   1      }
  43          
  44          void Timer0_ISR () interrupt 1 {
  45   1          switch(state) {
  46   2          case DETECTING_USER:
  47   2      		Sonar_Timer0_Handler();
  48   2      		break;
  49   2          case REQUESTING_ID:
  50   2      		RF_Timer0_Handler();
  51   2      		break;
  52   2          case CHECKING_ID:
  53   2      		FPGA_Timer0_Handler();	
  54   2      		break;
  55   2          }//end switch
C51 COMPILER V6.00 DOOR                                                                    05/29/2001 18:52:39 PAGE 2   

  56   1      }
  57          
  58          
  59          void Ext1_ISR() interrupt 2 {
  60   1      	if(state == CHECKING_ID)
  61   1      		FPGA_Ext1_Handler();			
  62   1      }
  63          
  64          
  65          
  66          void Timer1_ISR () interrupt 3 {
  67   1      
  68   1      }
  69          
  70          
  71          void Serial_ISR() interrupt 4 {
  72   1      	switch(state) {
  73   2      	case REQUESTING_ID:
  74   2      		RF_Serial_Handler();
  75   2      		break;
  76   2      	}
  77   1      }
  78          
  79          
  80          
  81          
  82          
  83          
  84          


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    313    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =      2    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)