/* fpga.c */

#include "fpga.h"
#include "W77C32.H"

/* # of 25 ms before timeout */
/* time out flag */
static bit timeOut = 0;
static bit done = 0;
static bit run = 1;
unsigned char subseconds = 0;
unsigned char seconds = 0;
unsigned char loop = 0;

char xdata *led = 0x0f000;  // the FPGA is configured to memory map led to this address

void main()
{
//	*led = 0x07;
	while(loop < 3)
	{
//		*led = 0x12;		// 1
		FPGA_Task();
		loop = loop + 1;
//		*led = 0x77;		// 0
//		*led = loop;
	}
	while(1){}
}
void FPGA_Task() {

	/* set timer */
	PCON = PCON | 0x80;
	TMOD = 0x21;
//	TH1 = 249;
//	TR1 = 1;

	/* Set up and enable Timer0 for a 1 millisecond timer   */
	TL0 = FPGA_RELOAD_LO_B;	/* Load the timer high and low bytes        */
	TH0 = FPGA_RELOAD_HI_B;
	EA = 1;				/* Enable the global interrupt  */
//	EX0 = 1;			/* Enable the external interrupt 0 */
	EX1 = 1;			/* Enable the external interrupt 1 */
	IT0 = 1;			/* Enable the TCON for falling edge trigger */

	run = 1;
	done = 0;
	timeOut = 0;
	T1 = 0; 			// p3.5: pin 22, inv(Request) = 1
	TR0 = 1;			/* Start the timer 0             */
	ET0 = 1;			/* Enable the timer interrupt 0 (Page 55) */
	PT0 = 1;			/* Timer 0 Interrupt Priority */
//	IE0 = 0;
	*led = 0x3A;	// 4
	while (run) {
		if((done) || (timeOut))
	 	{
			*led = 0xFF; //8
			run = 0;
			ET0 = 0;			// disable timer interrupt 0
			EX0 = 0;			// disable ext int 0
			EX1 = 0;			// disable ext int 1
			EA = 0;
			T1 = 1;				// p3.5: pin 22, inv(Request) = 0
			if(timeOut) 
			{
				*led = 0x7B;	//9
				// reset FPGA;
			}
//			state = DETECTING_USER;
		}
	}
}/* end FPGA_Task */

//void FPGA_Ext1_Handler() interrupt 0 {
void FPGA_Ext1_Handler() interrupt 2 {
//*led = 0x5D;	//2
	done = 1;
	IE0 = 0;
} /* end of FPGA_Ext1_Handler() */


void FPGA_Timer0_Handler() interrupt 1 {
	TL0 = TL0 + FPGA_RELOAD_LO_B ;   // Load the timer high and low bytes        
	TH0 = FPGA_RELOAD_HI_B;
	subseconds = subseconds + 1;

	if (subseconds == 100) {      // and check for one/tenth-second rollover        
    	subseconds = 0;
    	seconds = seconds + 1;
		if(seconds == 4)
		{
			timeOut = 1;
			seconds = 0;
		}
 	}	
} /* end of FPGA_Timer0_Handler() */


/*	
	case 0:		value = 0x77; init =1;		break;
	case 1:		value = 0x12;		break;
	case 2:		value = 0x5D;		break;
	case 3:		value = 0x5B;		break;
	case 4:		value = 0x3A;		break;
	case 5:		value = 0x6B;		break;
	case 6:		value = 0x6F;		break;
	case 7:		value = 0x52;		break;
	case 8:		value = 0xFF; 		break;
	default:		value = 0x7B;
*/