NET PADCLK	LOC=P13; 	# CLOCK FROM 24Mhz Crystal  (12Mhz clock is P13)

# VGA Driver outputs, shared with the 7-segment LED display
NET PADRGB0	LOC=P25;		# LED0,  BLUE0
NET PADRGB1	LOC=P26;		# LED1,  BLUE1
NET PADRGB2	LOC=P24;		# LED2,  GREEN0
NET PADRGB3	LOC=P20;		# LED3,  GREEN1
NET PADRGB4	LOC=P23;		# LED4,  RED0
NET PADRGB5	LOC=P18;		# LED5,  RED1
NET PADHSYNC	LOC=P19;		# LED6
NET PADVSYNC	LOC=P67;		# (Microcontroller Port1.7)

# LED seven seg. display
#NET PADLED0	LOC=P25;		
#NET PADLED1	LOC=P26;		
#NET PADLED2	LOC=P24;		
#NET PADLED3	LOC=P20;		
#NET PADLED4	LOC=P23;		
#NET PADLED5	LOC=P18;		
#NET PADLED6	LOC=P19;	

# PC Parallel Port Data bits
NET PADPC_D0	LOC=P44;
NET PADPC_D1	LOC=P45;
NET PADPC_D2	LOC=P46;
NET PADPC_D3	LOC=P47;
NET PADPC_D4	LOC=P48;
NET PADPC_D5	LOC=P49;
#NET PADPC_D6	LOC=P32; # MUST USE SPECIAL-PURPOSE SCHEMATIC FOR
#NET PADPC_D7	LOC=P34; #   ACCESSING PC_D<6> AND PC_D<7> (MDO & MD2)

# Parallel Port Status bits
#NET PADPC_S3	LOC=P70;	# Microcontroller Port1.5
#NET PADPC_S4	LOC=P77;	# Microcontroller Port1.4
NET PADPC_S5	LOC=P69;	# Microcontroller Port1.6
#NET PADPC_S6	LOC=P66;	# Microcontroller Port3.1 (TXD)
#NET PADPC_S7	LOC=P75; #MUST USE SPECIAL SCHEMATIC (TDO) FOR THIS PIN

#
# MICROCONTROLLER PINS
NET PADXTAL1	LOC=P37; # INPUT CLOCK
NET PADRST	LOC=P36; # ACTIVE-HIGH RESET
# NET PADALE	LOC=P29; # Microcontroller output
# NET PADPSEN	LOC=P14; # Microcontroller output
# NET PADP1_3	LOC=P6; 	# Port1.3
# NET PADP1_2	LOC=P9;	# Port1.2
# NET PADP1_1	LOC=P8;	# Port1.1
# NET PADP1_0	LOC=P7;	# Port1.0 
# NET PADP3_4	LOC=P68;	# Port3.4 (T0)
# NET PADP3_7	LOC=P27;	# Port3.7 (RD) (Used for external memory)

# Memory Data and Address pins
# Shared with Microcontroller when Microcontroller
#  executes from external memory
NET PADDATA0	LOC=P41;   # MULTIPLEXED ADDRESS/DATA BUS
NET PADDATA1	LOC=P40;
NET PADDATA2	LOC=P39;
NET PADDATA3	LOC=P38;
NET PADDATA4	LOC=P35;
NET PADDATA5	LOC=P81;
NET PADDATA6	LOC=P80;
NET PADDATA7	LOC=P10;
NET PADADDR0	LOC=P3;    # DEMUXED LOWER BYTE OF ADDRESS
NET PADADDR1	LOC=P4;
NET PADADDR2	LOC=P5;
NET PADADDR3	LOC=P78;
NET PADADDR4	LOC=P79;
NET PADADDR5	LOC=P82;
NET PADADDR6	LOC=P83;
NET PADADDR7	LOC=P84;
NET PADADDR8	LOC=P59;   # UPPER BYTE OF ADDRESS
NET PADADDR9	LOC=P57;
NET PADADDR10	LOC=P51;
NET PADADDR11	LOC=P56;
NET PADADDR12	LOC=P50;
NET PADADDR13	LOC=P58;
NET PADADDR14	LOC=P60;
# NET PADADDR15	LOC=30;    - implied by special pad: MD1
# NET PADADDR16	LOC=P72;  - not used

#
# RAM CONTROL PINS
NET PADOE	LOC=P61; # OUTPUT ENABLE (active low)
NET PADCS	LOC=P65; # CHIP ENABLE (active low)
NET PADWR	LOC=P62; # WRITE ENABLE (active low)  (Port 3.6 for external memory)

# XBUS interface with microcontroller
NET PADSTROBE	LOC=P27;   # Port 3.7
NET PADCOM1	LOC=P70;   # Port 1.5
NET PADCOM0	LOC=P77;   # Port 1.4
NET PADXDATA3	LOC=P6;   # Port 1.3
NET PADXDATA2	LOC=P9;   # Port 1.2
NET PADXDATA1	LOC=P8;   # Port 1.1
NET PADXDATA0	LOC=P7;   # Port 1.0