#include "xbus.h" #include #include // constant unsigned long bits_32; unsigned int bits_16; // send data unsigned long send1; unsigned int send2; int counter; // using for testing only -- timer 1 int temp; // time out between packets char i; // bit count bit rise_edge; // rise_edge -- trigger new bit sending //sbit clk = P1 ^ 1; // pin 8 //sbit data_out = P1 ^ 2; // pin 9 sbit clk = P3 ^ 4; // pin 68 sbit data_out = P3 ^ 1; // pin 69 //sbit mouse_click = P3 ^ 3; //external interrupt 1 //pin 15 (not connected to FPGA) // --- shared variables bit Done; // send back to tell it's ok to put new data in bit En; // enable new sending //--------------- Anita's code int Diamond; unsigned char CameraX; //Bright Pixel Row data from Camera unsigned char CameraY; //Bright Pixel Column data from Camera unsigned char Status; unsigned char NewX; //New Bright Pixel Row in Monitor pixels unsigned char NewY; //New Bright Pixel Column in Monitor pixels unsigned char OldX; //Last Bright Pixel Row in Monitor pixels unsigned char OldY; //Last Bright Pixel Column in Monitor pixels unsigned int StatusAddress; //Address of Status register in FPGA unsigned int RowAddress; //Address of Row Data Register in FPGA unsigned int ColumnAddress; //Address of Column Data Register in FPGA //Data before sign change int PreXData; int PreYData; //Data to PS/2 char x,y; // XData,YData char sign; // Sign // --------------------------- // -------------- clock input into PS/2 mouse port void generate_clk (void) interrupt 1 using 1 { // timer 0 temp++; if (temp < 22) clk = ~clk; if (clk) rise_edge = 1; if (temp == 22) { clk = 0; rise_edge = 0; } else if (temp == 26) { temp = 0; clk = 1; rise_edge = 1; } } //------------------------- for testing only void Newframe ( void ) interrupt 3 using 2 { if (counter++ == 32000) { counter = 0; Done = 1; // ready to get new data in ET1 = 0; } } // load new_frame void new_load(void) { char j; unsigned int temp_x,temp_y; char my_x,my_y; bit Yparity,Xparity; unsigned long temp1; Yparity = Xparity = 1; temp1 = 0; temp_x = temp_y = my_x = my_y = 0; switch(sign) { case 1: // Up - right my_x = x; my_y = y; bits_32 = 0x00200410; break; case 2: // Down - right my_x = x; my_y = 0 - y; bits_32 = 0x00200650; break; case 3: // Down - left my_x = 0 - x; my_y = 0 - y; bits_32 = 0x00200470; break; case 4: // Up - left my_x = 0 - x; my_y = y; bits_32 = 0x00200630; break; } // temp_x = my_x & 0x00FF doesn't work -- need to break down like below temp_x = my_x; temp_y = my_y; temp_x = temp_x & 0x00FF; temp_y = temp_y & 0x00FF; for (j = 0; j < 8; j++) { Xparity = Xparity ^ (my_x & 0x01); Yparity = Yparity ^ (my_y & 0x01); my_x = my_x >> 1; my_y = my_y >> 1; } // encode the packets temp1 = ((temp1 | Yparity) << 8) | temp_y; // take cares parity & y temp1 = ((((temp1 << 3) | Xparity) << 8) | temp_x ) << 12; send1 = bits_32 | temp1; send2 = bits_16; } void init () { TMOD = 0x22; TCON = 0x50; TH0 = 169; TH1 = 6; data_out = 1; rise_edge = 0; clk = 1; En = 1; EA = 1; counter = 0; // for timer 1 i = 0; // sending counter temp = -1; bits_16 = 0x0C01; // 12 bit 2nd packet // ----- Anita's code Done = 1; sign = 0; Diamond = 1; En = 0; StatusAddress = 2; //Address of Status Register in FPGA RowAddress = 0; //Address of Row Data Register in FPGA ColumnAddress = 1; //Address of Column Data Register in FPGA ALE = 0; // ------------------------ } // Anita's code char FindSign ( int X, int Y ) { char tempSign; tempSign = 0; if (X > 0 && Y > 0 ) // X > 0 and Y > 0 //abs(X) == X && abs(Y) == Y tempSign = 1; // Quadrant 1 else if (X < 0 && Y > 0) // Quadrant 4 tempSign = 4; else if (X < 0 && Y < 0) // Quadrant 3 tempSign = 3; else if (X > 0 && Y < 0) // Quadrant 2 tempSign = 2; else // ERROR CONDITION!! tempSign = 0; return (tempSign); } // ------------------------------------ void main() { init(); while (1) { // all programs run foreve //----------- Anita's code Status = XRead(StatusAddress); //Read data from FPGA at Address 2 //********* DEBUG *************** // Status = 1; if (Status == 1) //There is data for me to read from FPGA { CameraX = XRead(RowAddress); //Read data from the FPGA at Address 0 CameraY = XRead(ColumnAddress); //Read data from the FPGA at Address 1 //******** DEBUG *************** // CameraX = 100; // CameraY = 100; //insert function to translate between pixels // ********** FOR TESTING PURPOSES ********************* // Monitor Resolution: 1280 X 1024 Camera Resolution: 256 X 256 // Ratio: 6 X 5 NewX = CameraX * 6; NewY = CameraY * 5; //insert function to determine relative movement PreXData = OldX - NewX; // Relative movement PreYData = OldY - NewY; OldX = NewX; // Keep the current data as 'old' data OldY = NewY; if (Done && !En) // I can put new data in the variables to send to the PS/2 port { /* switch(Diamond) { case 1: Done = 0; // reset done PreXData = 150; PreYData = 150; Diamond = 2; break; case 2: Done = 0; // reset done PreXData = 150; PreYData = -150; Diamond = 3; break; case 3: Done = 0; // reset done PreXData = -150; PreYData = -150; Diamond = 4; break; case 4: Done = 0; // reset done PreXData = -150; PreYData = 150; Diamond = 1; break; } */ x = abs(PreXData); y = abs(PreYData); sign = FindSign(PreXData, PreYData); En = 1; // Set En high to let PS/2 port know that we have data in the variables } } // ----------------------------------------------------------------------- if (En) { // if something to send new_load(); En = 0; // reset it data_out = 0; // 1st bit - force to low to start transmitt data send1 = send1 >> 1; i++; ET0 = 1; // make sure that the clock egde go down after data_out = first bit of sending data. } if (( i < 32) && rise_edge) { // 32 bit of data data_out = send1 & 0x00000001; rise_edge = 0; send1 = send1 >> 1; i++; } else if (( 31 < i) && (i < 43) && rise_edge) { // 12 bit of data - total is 44 bit of data data_out = send2 & 0x00000001; rise_edge = 0; send2 = send2 >> 1; i++; } else if ((temp == 0) && (i == 43)) { ET0 = 0; temp = -1; data_out = 1; rise_edge = 0; i = 0; clk = 1; ET1 = 1; } } }