Compiling and Programming for XCV1000bg560

Create a workspace

• First, peruse the Active HDL tutorials.
• When creating a Workspace, you want to select
  • Synthesis tool:Synplify Pro 7.x
  • Implemntation tool:Xilinx ISE 5.1
  • Default family:Xilinx 51 VIRTEX - this option may not show up
• Active HDL TUTORIAL #1 . CREATING AND SIMULATING SIMPLE SCHEMATICS
• Active HDL TUTORIAL #2 . HIERARCHY, BUSSES AND TEST FIXTURES

Synthesize

• Select the design flow window
• Select synthesis options
• Select the highest level verilog in the Top-Level Unit box
• Change the Family to Xilinx51 VIRTEX
• Change the Device to V1000bg560, the V1000 part in the Ball grid array package
• Press ok, and press the Synthesize button
• Synplify Pro should start up, and press the Run button.
• Close Synplify
• Select refresh file list to the right of synthesis
• In the Netlist box, Browse to the .edf file (it should be somewhere like proj_dir/synthesis/top_level_name/top_level_name.edf ). You will have to press the refresh fil list after running synthesis to get the ? to become a Check.
• Press OK

Implement

• Select options, to the left of implementation.
• Select GUI mode.
• Deselect Overwrite existing impl proj.
• Press OK
• Press implmentation
• Right clock on xcv1000-4bg560-EDIF, and select New Source
• Select Imlemenation Contrainsts File, and name it.
• Press next twice, then finish
• Double click on Assign Package Pins, say Yes to treat unconnected pins as user I/O. This starts Xilinx PACE
• You can drag 'n drop Locations to Pins.
• Save and exit PACE
• Select the top level project, under xcv1000...
• Double click on Configure Device (iMPACT) under Generate Programming File. This will take a while, as it places and routes your design.

Program

• iMPACT will eventually start up, and present you with a wizard
• Select Prepare Configuation Files, then next.
• Select PROM file, then next.
• Select PROM File Format: MCS, then next.
• Select Auto select PROM, then next.
• Press next.
• Press Add File
• Select the bit file and press OK
• Press No to add another design file
• Press finish, yes, no
• Exit iMPACT
• Run Hardware Debugger, C:\Xilinx\bin\nt\hwdebug\hwdebugr.exe
• Select Xchecker, The com port you have connected to, 115200
• open the MCS file you created (use the New Project button)
• Press download. It should download the MCS file to your FPGA