Lecture 3: Address spaces

Preparation

• Read OSPP §8, Address Translation.
• Compare this entrypgdir.c file with kern/entrypgdir.c in your JOS. What’s the difference?

Overview

• Last lecture
  • isolation and sharing
  • kernel, user space, system calls
  • kernel organization: monolithic kernel, microkernel, exokernel
• virtual addresses
  • popular in modern OSes: not just for isolation; more examples next week
  • both kernel and user space are virtual addresses
  • again, even pointers in kernel are not using physical addresses
• MMU (memory management unit)
  • hardware support: VA → PA translation [ draw the workflow ]
  • cache: TLB (translation lookaside buffer)
  • segmentation vs. paging
• paging
  • page: fixed-size memory chunk (e.g., 4KB/2MB/4MB on x86)
  • page table: address translation map
  • entry: physical address, plus flags
    • P/W/U: present/writable/user
    • A/D: accessed/dirty
    • see inc/mmu.h
  • isolation
    • per-process page table: switch with process
    • kernel (un)sets W, etc.
• x86 control registers
  • CR0: turn on paging
  • CR3: pointer to page table
  • CR2: will use it later for page faults

Single-level paging

• x86: 4M single-level paging
• VA → PA translation
  • linear address
    • bits 31-22: page directory index
    • bits 21-0: offset into 4M page
  • page directory entry
    • bits 31-22: physical 4M page address
    • bits 21-12: reserved
    • bits 11-0: flags
• JOS: used during booting kern/entrypgdir.c
  • set a breakpoint at i386_init
  • QEMU: info mem and info pg (only in our patched QEMU)
    • what’re the results?
    • implement info pg in your JOS kernel monitor
  • what’s the physical/virtual address of the kernel
  • what to put in CR3
  • any difference between write to 0x00008000 and to 0xf0008000

Multi-level paging

• x86: 4K two-level paging
  • why not just 4K single-level paging?
  • try this entrypgdir.c
• VA → PA translation
  • linear address
    • bits 31-22: page directory index
    • bits 21-12: page table index
    • bits 11-0: offset into 4K page
  • page directory entry (PDE)
    • bits 31-12: page table address
    • bits 11-0: flags
  • page table entry (PTE)
    • bits 31-12: physical 4K page address
    • bits 11-0: flags
• x86_64: 4K four-level paging
  • pros & cons
  • trade-off