Homework 3 Part 1 Answers

Problem 5.5

6 points total

1 point for saying there was no change to the datapath, or less preferably you drew an unmodified diagram.

1/2 point per correct signal value (RegDst, ALUSrc etc) plus a free 1/2 point (it makes the point total a whole number).

The signal values should be:

RegDst	ALUSrc	Memto- Reg	Reg Write	Mem Read	Mem Write	Branch	ALUOp1	ALUOp2
0^a	1^b	0^c	1^d	0^c	0^c	0^e	0^f	0^f

^a We want the rt field, not the rd field which does not exist in this instruction.
^b The other input to the ALU is the sign-extended lower 16 bits of the instruction.
^c Memory is not accessed, apart from the instruction memory.
^d We want to write a value into a register.
^e This is not a branch instruction.
^f There is no funct field in the instruction, so there are only two possible settings for the ALUOp bits: 00 or 01. Of these two 01 performs a subtraction, so we want 00.

Problem 5.10

4 points total

1 point for saying it would not affect a single cycle datapath.
1 point for a reason why this is the case, no matter whether you said it would or would not affect the datapath.

1 point for explicitly stating it would not affect a multicycle datapath.
1 point for a reason why, again no matter whether you said it would or would not affect the datapath.

In the single cycle datapath, both signals are asserted or deasserted at the same time for any operation, or one signal has a value and the other is a don't care. Hence we can use one combined control signal.

In the multicycle datapath, it is not the case that the signals are asserted or deasserted at the same time. However they can be and the finite state machine can be modified accordingly. The deasserted RegWrite signal will prevent old values in the memory data register from being written to the register file. That is only when a load from memory has completed will we write into the register file. Note that this same deasserted signal prevents the instruction fetch stage from accidently overwriting a general purpose register.

Problem 5.15

9 points total

If you only drew the part of the finite state you had to make it clear what changes you had made, for example distinguishing new states from existing ones.

1 point for saying there was no change to the datapath, or less preferably you drew an unmodified diagram.

7 points for the finite state diagram:

1 point for adding "or (Op = 'addi')" to the label on the arrow from state 1 to state 2.
1 point for a new state (state 10) with a label.
In this new state:
- 1 point for deasserting RegDst.
- 1 point for asserting RegWrite.
- 1 point for deasserting MemToReg.
1 point for an arrow from state 2 to state 10 labelled "(Op = 'addi')".
1 point for an arrow from state 10 to state 0.

If you had more than one new state you lost 1 point.

1 point for stating how many cycles it takes to to execute an addi instruction.

The number of cycles for addi is the same as any R-type instruction i.e. 4 cycles. To work this out, you just have to count the number of transitions you make when following the path through the finite state diagam for an addi instruction, starting and ending in state 0.