Control Line Settings
MemtoReg
15-11
Read
register1
Read
register2
Write
register
Write
data
Registers
Read
data 1
Read
data 2
Zero
ALU
result
Read
address
Write
address
Write
data
Data
Memory
ALU
Read
data
Sign
extend
Read
address
Instruction
Memory
Instruction
PC
4
Add
Shift
left2
Add
ALU
result
RegWrite
RegDest
MemRead
MemWrite
ALUSrc
ALU
Control
25-21
20-16
15-0
5-0
AND
Signal
R-type
lw
sw
beq
RegDest
1
0
X
X
ALUSrc
0
1
1
0
MemtoReg
0
1
X
X
RegWrite
1
1
0
0
MemRead
0
1
0
0
MemWrite
0
0
1
0
Branch
0
0
0
1
ALUOp1
1
0
0
0
ALUOp0
0
0
0
1
Branch
0
1
0
1
0
1
0
1
ALUOp
Previous slide
Next slide
Back to first slide
View graphic version